Figure
1. This simple circuit
includes three synchronous
demodulators and two
integrators that process the
demodulation signal. The modulation
is achieved by switching
the microncroller's I/O pins
between high impedance and current sinking
states, so no additional
analog switches or multipliers
are needed. The first
op-amp stage (pins 8,9, and 10) is used
to provide a uniformly low output
impedance to the demodulators. It can be converted to a gain
stage or a filter, provided there
is sufficient loop gain to maintain a
sufficiently
low output impedance.
Introduction
After a successful synchronous demodulator project, as described
in
Digital Lock-in
Milliohmmeter and
Experimental 1
kHz Synchronous Demodulator, I looked for a way to improve upon on
the basic synchronous demodulator that I used in those projects. I was
looking for a way to reduce the component count, eliminating the
transmission gates if possible. I also wanted the demodulator to be
able to lock to signal from a remote source, all the while maintaining
the benefits of noise rejection and processing gain that one would
expect from a synchronous demodulator, because such a circuit
might lead to a simple but robust modulation and demodulation scheme
for RF communications.
The circuit in figure 1 is that of a synchronous demodulator that meets
these requirements, and additionally, it operates from a single
positive power supply. The circuit will be described in detail later in
this page. The ATtiny2313 microcontroller is used as a voltage
controlled crystal oscillator and Barker code generator, and could be
replaced with small scale logic devices. The code generation is
initiated by
interrupts from the microcontroller's internal 8 bit timer, and there
is plenty of time available for control and computational tasks that
could used to modulate the Barker code stream with data or to decode an
incoming stream. The ATtiny2313 has three Barker code outputs, shifted
one half of a chip in period (the time period allotted to one bit in
the
Barker code) from one-aonther, that appear to the external circuitry as
though they are open drain outputs, it has three regular CMOS
outputs that are
similarly time shifted with respect to one another, and it has a sync
output
that occurs one time with each repetition of the Barker code. The sync
signal is to facilitate testing of the circuit.
This implementation, using a 7 bit Barker code with a 148 microsecond
chip rate, was intended as a means of proving a concept. The low chip
rate was selected because it is easy to deal with using the inexpensive
equipment available to me. A longer Barker code and a faster chip
rate would increase performance, and merely scaling the design will
provide those improvements.
Figure 2. The circuit of an
infrared
beacon, which transmits a continuous
stream of the 7 bit Barker code.
The Barker code gates a 50 milliamp
constant current source made of
the two 2N4401 transistors.
As a test signal source, I programmed an
ATtiny12 microcontroller with code similar to the ATtiny2313 and uses
its code output pin to drive a gated constant current source, which in
turn drives an infrared LED with 50 milliamps. The LED emitted light in
accordance with the Barker code sequence sent from the chip.
As with the ATtiny2313, this function could be easily replaced with
discrete logic. In addition to the code output, the ATtiny12 also has a
sync output that occurs one time with each repetition of the Barker
code.
In an experiment to visually illustrate
operation of the demodulator, I connected a photo diode between the
signal input and "ground" on the demodulator circuit in Figure 1 and
used the 7 bit Barker code beacon shown in Figure 2. There was no
electrical connection between the beacon and the demodulator, except
that their power supplies were plugged into the same electrical outlet.
During some experiments, the beacon was battery operated, and I did not
notice any difference in performance between those experiments in which
the beacon was battery operated and those experiments in which the
beacon was powered from a power supply.
Before testing, the free run frequency of the demodulator had to be
set.
Channel one of a Tektronix TDS-2002 oscilloscope was connected to
the
punctual Barker code
output pin on the ATtiny2313 (ATtiny2313 pin 18), and scoope was sync'd
to the sync output of the ATtiny2313 (ATtiny2313 pin 16). Channel two
of the scope was connected to the Barker output of the ATtiny12 on the
beacon assembly (ATtiny12 pin 7) and the infrared LED on the beacon was
covered so demodulator would not detect the beacon's signal. While
simultaneously viewing the prompt Barker code generated on the
demodulator and the Barker code generated by the beacon, the free run
frequency of the demodulator was adjusted so that rate of local prompt
Barker code
generation was fraction of a word per second slower than that of the
beacon.
Channel two of a Tektronix TDS-2002 oscilloscope was then moved to
the
output of the voltage follower stage in the demodulator (LM324 pin 8)
and the IR LED on the beacon was uncovered. letting some of the light
from the LED fall on the photo diode connected to the demodulator.
Photo 1 and Photo 2 show what the signals looked like.
Photo 2. This is a screen shot
while the scope (Tektronix
TDS-2002)is in the sampling mode. The blue
trace shows the
incoming signal from a photo diode, with the noise provided by
fluorescent lights
and a dangling 1 meter clip lead. The yellow trace is the prompt Barker
code generated by the ATtiny2313 on the demodulator. The scope was
synchronized to the sync output on the ATtiny2313.
Even though the singal-to-noise ratio
was rather poor, the demodulator managed to lock to the incoming signal
and so provided sync for the scope, so when I switched the scope to
Averaging mode, in which the waveform was averaged over 128 cycles, the
received waveform was displayed clearly.
Photo 3. This is a screen shot
while the scope (Tektronix TDS-2002) was in the averaging mode, showing the
incoming signal from a photo diode, with most of the noise removed by
integration. The effect is similar to what happens in the circuit -the
demodulated signal is integrated and the 50 Hz and other noise signals
are average to a low value, leaving the signal.
The averaging of the waveform samples by
the oscilloscope is analogous to the function of the demodulator. The
average value of random noise is zero. Nearly every signal that is not
the expected Barker code appeared as noise to the integrators
following the demodulator stages, and since the output of the
integrator is the average of input signals over a period of time, the
noise was averaged to a very low level.
Signals
To appreciate the basics of lock-in amplifiers, please read the
article,
Digital
Lock-in
Milliohmmeter. The article
explains and
illustrates the concepts in some detail. The Lock-in Milliohmmeter
described in the article uses a 1 kHz square wave which is generated by
the microcontroller, converted to a current waveform, and then measured
through the process of synchronous demodulation. Another article about
the same synchronous demodulator,
Experimental 1 kHz Synchronous Demodulator, examines the
sensitivity of the demodulator and its ability to measure very small
signals in spite of the circuit relying on a quad op-amp that is not
known for its low noise performance or exceptional DC stability.
The main problem with using a simple square wave for low level
measurements is that they are susceptible to noise, especially at the
signal frequency and its odd harmonics. One solution to this
susceptibility is to transmit and demodulate with a signal that is made
of many different frequencies, one that effectively looks like random
noise, but isn't really random. This signal is referred to as pseudo
noise, or PN, in many signal processing articles. Figure 3 and Figure 4
show the 7 bit pseudo random sequence used in this series of
experiments. This 7 bit sequence is the 7 bit Barker code. All versions
of a particular Barker codes that are inverted and/or shifted in time
are the same Barker code.
Figure 3. The 7 bit Barker code.
In these experiments, the 7 bit
code is repeated 970 times per
second.
Figure 4. Two repetitions of the
7 bit Barker code. In
actual application, a
continuous stream is generated.
A barker code was used because they are ideally suited for determining
correlation of signals. Barker codes up to 13 bits in length have been
found. It is not known, but it is widely held that longer Barker codes
do not exist, meaning that there are only seven Barker codes (of length
2, 3, 4, 5, 7, 11, and 13 bits). Pseudo noise codes of greater lengths
can be used in this
application, and indeed, the longer the PN code, the less susceptible
the system will be to interference. I used the 7 but Barker code
because it is the longest Barker code that fits inside the AVR
microcontroller's 8 bit registers, and 7 bits is sufficient to
demonstrate the behavior of the system.
Demodulation
process
Figure
5. Block diagram of a synchronous demodulator.
The result of averaging or integrating of AC coupled random noise over
a
long period of time be nearly zero.
To start with, a 7 bit Barker pseudorandom noise pattern is
transmitted.
The synchronous demodulator uses the same pseudorandom noise pattern to
demodulate, or
detect the
incoming signal.
When a pseudonoise signal is used to demodulate the incoming signal and
its accompanying noise, the incoming PN signal will be rectified -that
is, it is converted to a DC value, while and DC offset, the
accompanying noise and other signals will be converted to a noise
pattern. The DC modulated by the PN sequence will be the PN sequence,
with its amplitude corresponding to the level of the DC voltage into
the demodulator, and the noise into the demodulator will become
sidebands to the frequency components of the PN sequence.
The output of the demodulator drives an integrator, which averages the
signal over time.
As a result, the DC and noise accompanying the incoming Barker code (PN
sequence) is converted to noise, which is averaged to near zero, while
the incoming Barker Code is converted to a DC level which can be
measured.
It should be noted that the demodulator acts by modulating the incoming
signal by the PN sequence with a four quadrant multiplier.
Demodulators
The process of demodulation is accomplished by multiplying, or
modulating, the incoming signal by a locally generated signal that is
the same PN sequence at the same frequency and in the same phase as the
incoming signal. The problem of synchronization is discussed in the
next section.
The incoming signal is demodulated by three switched resistor
modulators. This switched resistor modulator accomplishes full
four quadrant multiplication by switching a node of a resistor network
to ground according to the locally generated PN sequence. An
advantage of this circuit over some candidate circuits is
that the modulation action can be accomplished with the switching
action of a microcontroller's output pin or an
open collector, or open drain digital output so that an analog
multiplier
is not required.
The definition of four quadrant multiplication is shown in table 1. In
this table,
the input signal is analog, and the local PN code is bipolar. The Local
PN code, which is used to demodulate the input signal can only have the
values of
0 and 1 because the switching is performed by a microcontroller's
digital output pin.
Table
1. Results of four quadrant
multiplication.
The function of the modulator can be seen as switching between the
input signal (+) and an inverted input signal (-). Figure 6 and Figure
7 illustrate the modulator in action. In the
illustrations below, S1 and S2 represent CMOS microcontroller output
pins that are switched between high impedance and current sinking
states.
Figure
6. Switched resistor
modulator in the
"closed" position, where the
modulating signal
is considered to have a value of
-1. The output
signal appears on the output, inverted.
Figure 7. Switched resistor
modulator in the
"open" position, where the
modulating signal
is considered to have a value of
+1. The output
signal appears on the output, not inverted.
When S1 is closed (Figure 6) , only
current from the univerted signal current enters the op-amp's summing
node through R12, resulting in an inverted waveform at the output of
the op-amp. When S1 is open (Figure 7) current from the uninverted
signal and twice as much current from the inverted signal enter the
summing node of the op-amp, resulting in an uninverted signal on the
output.
In the actual circuit, there is a large capacitor across the op-amp's
feedback resistor, so there are no pulses at the output of the op-amp.
Instead, there is a DC voltage, which is proportional to the amplitude
of the incoming signal.
in practice, when using these demodulators with a single power
supply, the switching of the resistor networks to ground causes an
offset on the integrators' outputs. The offset can be adjusted out by
adding an offset signal to the summing node.
There
is also an imbalance in the signals that results in some of the
modulating signal feeding through. The imbalance is the result of a
slight difference in the inverting and non-inverting gain of the
circuit. This imbalance can be trimmed out by varying one of the input
resistances, most easily by making R1 adjustable.
Phase
Lock
The phaselocking method is based on the method described in an article
by James A. Vincent, G1PVZ,
Spread
Spectrum: Voice Over Spread Spectrum Radio. In Mr. Vincen'ts
article, a PN code is generated and it is delayed to provide three
phases. One, the "early" phase is first, followed by a "punctual"
phase, which is then followed by the "late" phase. The three phases are
separated by 1/2 of a chip, or bit time.
Since I am only dealing with baseband signals, I was able to eliminate
the RF and IF circuitry and the separate integrators for early and late
codes that Mr. Vincent used, and combine the demodulator's outputs at
the summing node of the integrator. The principle of operation is the
same. The local Barker code generator is made to run just a little
slower than that of the incoming signal. This causes the signals to
slide past one-another in phase. When the signals line up, the output
of the integrator, which controls the oscillator frequency, changes to
provide negative feedback to the phase/frequency loop and locks the
local punctual Barker code generator in synchronization with that of
the incoming signal. You can see this happen in the video clip (Clip 1)
below.
Clip
1. Click on the image above
to
see and MPG video of the code
locked
loop locking up. The loop's
response
is clearly underdamped.
The free run frequency of the local Barker code generator is adjusted
by adjusting the offset pot on the phase lock integrator (op-amp pins
5,6, and 7). The ratio of the demodulator resistor values to the op-amp
feedback resistor value, in conjunction with the VCXO's sensitivity
(the ATtiny2313 in conjunction with the ceramic resonator and the
varactor) set the DC loop gain of the code-locked loop, and along with
the difference in frequencies between the incoming PN rate and the
local PN code rate, ultimately determine the maximum static phase error
and the maximum hold frequency range. Making the feedback resistor
larger would increase the loop gain and that would reduce the maximum
static phase error and increase the maximum hold frequency range.
The AC feedback element in the schematic is simply a capacitor.
Generally larger capacitors mean lower susceptibility to noise, and a
smaller frequency pull-in range. I tried a more complicated lead-lag
network (a 100k resistor shunted by a small capacitor in series with
the 0.47 uf integrating capacitor) and confirmed that the loop can be
made to pull in over a wider range of frequencies, and pull in a lot
faster with a lot less overshoot and ringing. I put the original 0.47
uf capacitor back in place to continue the experiments.
The match between frequencies is very critical, and I had to hand
select pairs of crystals and ceramic resonators to work in the signal
sources and demodulators. I found that I could pull ceramic resonators
over a much larger frequency range than I could pull crystals, and
settled on ceramic resonators for the experiments. The problem with
using pairs of crystals was that the match was very critical because of
the small pull range, and thus selection of pairs was very tedious.
It should be noted that the code locked loop only locks up properly
with an incoming phase of the same phase as the punctual output signal
from the chip. As coded, that is with four logic lows and three logic
highs per 7 bit Barker code. The code-locked loop will not lock to
signals of such high amplitude that they drive the analog buffer and/or
inverter into saturation.
Amplitude
Measurement
A third demodulator is connected to a second integrator.
This demodulator is driven by the punctual code. The integrator
has an offset adjustment that allows compensation for the offset
created by switching the resistor network in the demodulator to ground,
and it is also used to position the integrator's output at an arbitrary
level with no input signal.
Figure 8. Output voltage of the punctual
integrator
as a function of input signal in millivolts peak-to-peak.
Figure 8 and Table 2 show the input to
output transfer function. As expected, the transfer function is fairly
lineary as long as the incoming signal remains
within the linear range of the buffer and inverting amplifier.
The
input
signal is AC coupled to a 90 millivolt reference. The value 90
millivolts was selected to
minimize the amplitude of the offsets created by switching the resistor
networks to ground. The outputs of the LM324 amplifiers can swing as
low as about 30 millivolts DC, thanks to some current sinking help
provided by the 300 ohm resistors from the op-amp outputs to ground.
The
inversion in the slope of the transfer function is the result of
clipping of the negative peak on the input buffer stage. The input
buffer stage is used to provide a stable low impedance with which to
drive the switched resistor demodulators.
Values in millivolts
input
output error compared to fit
0.0
16
16.3
1.1
21
0.0
1.5
31
2.5
2.8
58
2.8
3.8
76
1.6 m = 19.5662
6.4
130
5.2
8.6
176 7.1
12.5
253 8.0
17.6
345 0.5
23.8 463
-2.4
30.7
601
0.5
37.4
732 0.0
66.4
1183
-2.9
68.0
1211
-3.4
70.6
1261
0.0
110.0
1971
6.3 m =17.86
144.0
2401 -171.0
178.0
2041 -1138.4
204.0
1771 -1872.8
Table
2. Punctual integrator
output voltage as a function
of input code in millivolts
peak-to-peak.
RF
Transmission and detection/measurement example
Just as a physical proof of concept, I whipped up firmware for 181.8
Khz transmitter that is modulated by the 7 bit Barker code, programmed
an ATtiny2313 with the firmware, and connected my 1 square meter loop
antenna to it through a 1k resistor to limit current. Then I built a
simple TRF (tuned radio frequency) receiver, using a 5.5 cm long
ferrite rod antenna.
Within 1 meter of the loop antenna, the receiver was able to lock onto
the transmitted Barker code.
Figure 9. Attachment of the 1
square meter
loop to the ATtiny2313
transmitter chip.
Photo 4. This antenna was
made with a frame
of 1/2" PVC pipe and running a
length of 0.5 mm
square stranded copper wire (1
conductor of zip
cord)
through it. 90 Degree elbows are at three
corners and a "T" is at the
fourth corner
(lower right-hand corner in this
photograph),
providing
an exit for the 50 cm wire leads.
DC resistance is approximately
0.2
Ohms, and
the inductance is 6.2
microhenries.
Figure 10. A very simple TRF
receiver
using a 5.5 cm long ferrite
antenna
tuned to 181.8 kHz.
All this proved is that the PN code can
be transmitted as sidebands on an on-off keyed
carrier, and that this can be detected, demodulated, and locked to. The
signal level output (op-amp pin 1) indicated signal strength.
Ideas for applications
The 7 bit Barker code repetition rate
for
this implementation is only 970 times per second. I used this rate
because it is slow enough to be very easy to work with. I suspect that
with some care, a microcontroller could generate the code at several
hundred thousands of repetitions per second, and with logic, much, much
higher rates could be achieved. With higher chip rates, which are 7
times the code repetition rate, comes the ability to use a higher
corner
frequencies on the integrators, and thus the ability to send higher
speed data. In addition to measuring the amplitude of the incoming
signal, I have, with minor experiments, confirmed that data can be
encoded on the code stream and detected by making small shifts in the
chip rate. The only drawback for pure base band use is that polarity
must be maintained.
Here are some ideas:
• Communications by monitoring the
signal amplitude pin or chip rate as a function of time, for
- RF
- Optical
- Through-the-earth or cave radio
- Acoustic/ultrasonic/infrasonic
• Monitoring of signal level, especially in the presence of noise for
- Earth and liquid resistance
- Strain gauges
- RF
- Densitometry
-Acoustic ranging and volume measurement
• Robust HF, LF, or VLF Spread Spectrum RF communications by modulating
onto a carrier.
And a note
of caution
In addition to my regular disclaimer, which is at the bottom of
this page, I would like to point out especially for this project, that
many patents have been issued and certainly many applications have been
filed on this and related fields. The chances are very high that many
aspects of the concepts and implementations discussed on this web page
are already covered in patents. You are responsible, not I, for
assuring that any use you might contemplate for the
techniques discussed or shown here do not infringe on the rights of
others.
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VCXO.
Contents ©2006, 2007 Richard Cappels All Rights Reserved. Find
updates
at
www.projects.cappels.org
First posted in October, 2006.
Corrections April, 2007. Editorial enhancements October, 2007.
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Richard
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