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Clock/Calendar/ALARM

(one of thee pages for this project - see the bottom of this page) 

 

Summary:

The clock updates internal timekeeping registers once each second after which, if clock updates are enabled, the timekeeping registers are copied to the time registers in the DS Interface register set. Next, if enabled, the alarm compares the alarm time and alarm date stored in the DS Interface register set with the clock's internal timekeeping registers. When the alarm time and date agree with the time and date in the timekeeping registers, the alarm triggers the EEPROM interpreter if the enabled, otherwise it pulls the output pin (pin 1) low.

Clock/Calendar Command Set

Instructions sent over the DS Interface are capable of setting the clock/calendar, setting the alarm, writing and reading data and programs to the EEPROM, running the EEPROM Interpret and setting and reading chip status. The commands are sent as a byte preceded by a control bit set high. See the DS protocol or details.

Command       Function
1R Place contents of Incoming Data Register into register[R]
2R Read contents of register[R] to DS port
3X Dump time registers to DS port [Y:M:D:H:M:S]
4A Write contents of data register to EEPROM location [A]
5A Read contents of EEPROM location [A] to DS port
6X Interpret contents of EEPROM
7X Bless EEPROM (update checksum and ram flags)
8X Read firmware version number to DS port (2 bytes)
9X Set output pin high (Alarm Reset)


Command 1R; Place contents of Incoming Data Register into register[R]

Write the data in the Incoming Data Register to the selected register by sending a command byte composed of the value $1 in the upper nybble and the value ($0..$F) corresponding to the register to be written to in the lower nybble. For example, to write the data previously sent to the Incoming Data Register into the Control Register (register $F), send the value $1F as a command.


Command 2R; Read contents of register[R] to DS port

Causes the chip to send the value of a specified register to the host via the DS Interface. This command is sent by sending a command byte composed of the value $2 in the upper nybble and the value ($0..$F) corresponding to the register to be read from in the lower nybble. For example, to read the contents of the Control Register (register $F), send the value $2F as a command.



Command 3X; Dump time registers to DS port [Y:M:D:H:M:S]

This command causes the chip to send six data bytes representing the contents of the time registers. This command is sent by sending a command byte composed of the value $3 in the upper nybble and any value ($0..$F) in the lower nybble. For example, the commands $30 and $3A are both valid forms of this command and are indistinguishable from one-another by the chip. Updates of the time registers by the clock are suspended while the command is being executed by temporarily setting control register bit 1 and then clearing control register bit 1 at the end of the command.


Command 4A; Write contents of data register to EEPROM location [A]

Write the data in the Incoming Data Register to the selected EEPROM location by sending a command byte composed of the value $4 in the upper nybble and the value ($0..$F) corresponding to the address on the current EEPROM page to be written to in the lower nybble. For example, to write the data previously sent to the Incoming Data Register into EEPROM location $C on the current page, send the value $4C as a command.

The current page may be changed by writing to bits 5 and 4 of the Control Register. See the section on the Control Register for details.


Command 5A; Read contents of EEPROM location [A] to DS port

Causes the chip to send the value of a specified location in the EEPROM to the host via the DS Interface. This command is sent by sending a command byte composed of the value $5 in the upper nybble and the value ($0..$F) corresponding to address in the current EEPROM page to be read from in the lower nybble. For example, to read the contents of EEPROM address $C on the current page, send the value$5C as a command.


Command 6X; Interpret contents of EEPROM

This command causes the EEPROM Interpreter to begin interpretation of instructions in the EEPROM starting with the address stored in the Incoming Data Register. This command is sent by sending a command byte composed of the value $6 in the upper nybble and any value ($0..$F) in the lower nybble. For example, the commands $60 and $6A are both valid forms of this command and are indistinguishable from one-another by the chip.


For example, to begin executing a program in EEPROM starting at EEPROM address $20, send the data value $20 to the chip, followed by the command $60.


Command 7X; Bless EEPROM (update checksum and ram flags)


This command causes the chip to calculate the sum, without carry, of contents of bytes in EEPROM locations $00 through $FE and to store the sum at EEPROM location $3F. It also sets the CHECKSUM OK FLAG in the Control Register and sets internal flags so processes within the chip consider the EEPROM contents to be valid.

This command should be used to reestablish the checksum after writing to the EEPROM using the 4A command.


Command 8X; Read firmware version number to DS port (2 bytes)

This command causes the chip to send two data bytes corresponding to the firmware revision to the host over the DS Interface. The first byte corresponds to the version number and the second byte corresponds to the revision level of that version.

This command is sent by sending a command byte composed of the value $8 in the upper nybble and any value ($0..$F) in the lower nybble. For example, the commands $80 and $8A are both valid forms of this command and are indistinguishable from one-another by the chip.


Command 9X; Set output pin high (Alarm Reset)

This command causes chip to set the state of the Data Output Pin (pin 1) high. It serves to reset the pin to its initial state after, for example, the pin is set low by a the alarm or by the EEPROM interpreter.

This command is sent by sending a command byte composed of the value $9 in the upper nybble and any value ($0..$F) in the lower nybble. For example, the commands $90 and $9A are both valid forms of this command and are indistinguishable from one-another by the chip.




Register Assignments

Sixteen registers are accessible via read and write commands over the DS interface They are as follows:

     Register  Function
0 Incoming Data Register from DS port
1 RegisterA
2 Alarm mask
3 Year buffer
4 Month buffer
5 Day buffer
6 Hour buffer
7 Minute buffer
8 Second buffer
9 Year alarm
A Month alarm
B Day alarm
C Hour alarm
D Minute alarm
E Second alarm
F Control Register



Register 0; Incoming Data Register from DS port

This register serves as Incoming Data Register for the DS interface.

RegisterA

This register can be tested and incremented by the EEPROM Interpret. It can serve as an interface between the EEPROM interpreter and the DS interface and as a counter for the EEPROM interpreter. See the EEPROM interpreter instructions for more detail.


Register 2; Alarm Mask

      

The Alarm Mask Register is meant to reduce the number of conditions that need to be met for the alarm to trigger. By writing a zero into one or more flags, the corresponding units will be ignored when the clock checks to see if the conditions for an alarm have occurred. The Alarm Mask Register is initialized to $FF during power-on initialization.

Consider this example. The registers are set as follows:

Register 2 Alarm Mask Register =$01 (all but seconds ignored)
Register E Alarm Seconds = $20
Register F Control Register =$40 (Alarm Enabled, clock not stopped)


Each minute, when the value in the seconds buffer (register 8) equals $20, the alarm will trigger.


Registers 3,4,5,6, 7, and 8; Time Buffers
These data are updated by the clock in binary format with ranges as follows:
Reg 3 Year $00..$FF Reg 4 Month Reg 5 Day $00..$1C,$1D,$1E,$1F depending upon the month and whether it is a leap year or not. Reg 6 Hour: $00..$18 Reg 7 Minute: $00..$3B
Reg.8 Second: $00..$3B

Think of these read/write registers as the time input/output register for the clock. The clock updates these buffers each second to agree with the clock's own registers. They can also be written and when the "write time buffer to clock" flag is set, the values in these registers are copied to the clock's own registers.

The once each second updates to these registers from the clock can be stopped by setting the "clock stop" flag in the control register. Stopping the clock is necessary for both setting the clock and avoiding the problems that can result if the counters are incremented after some but not all registers have been read.

During chip initialization, the seconds register is written with the invalid value $FF, which is then overwritten about a second later by the clock. Thus, any read of the time that returns $FF in the seconds register is to be regarded as invalid as it was read before the registers were updated by the clock.

Registers 9, A, B, C, D, and E, Alarm Registers
These registers hold the value that is compared with the clock each second, provided that the alarm is enabled. The range of valid values is given below. During chip initialization, seconds is written with the invalid value $FF to assure that the alarm will not trigger until this register is programmed. Writing an invalid value to one of the registers while the corresponding bit in the Alarm Mask Register will keep the alarm from triggering.

Reg  9  Year alarm    $00..$FF
Reg A Month alarm $00..$0C
Reg B Day alarm $00..$1C,$1D,$1E,$1F depending upon the month and whether it is a leap year or not.
Reg C Hour alarm $00..$18
Reg D Minute alarm $00..$3B
Reg E Second alarm $00..$3B

Register F, Control Register

.

The control register holds flags that control activity or the clock. alarm, and EEPROM Interpreter. All bits may be read and written via the DS Interface. Some bits may be written by processes within the chip. The Control Register is initialized to $00 during power-on initialization.

   Bit           Function
0 EEPROM CHECKSUM OK
1 UPDATE TIME BUFFERS DISABLE
2 WRITE TIME BUFFERS TO CLOCK
3 CLOCK STOP
4 EEPROM PAGE Least Significant Bit
5 EEPROM PAGE Most Significant Bit
6 ALARM ENABLE
7 EEPROM INTERPRETER INHIBIT



BIT 0; EEPROM CHECKSUM OK

If set to 1, the sum, without carry, of contents of bytes in EEPROM locations $00 through $FE was found to be equal to the value stored EEPROM location $3F. This bit is set or cleared as appropriate during chip initialization. It is set to 1 during execution of the Bless EEPROM instruction, which calculates the current checksum, stores the checksum in the last EEPROM location, sets the EEPROM CHECKSUM OK flag, and sets internal flags.

This bit must be set in order for the EEPROM Interpreter to run in response to chip initialization, an external event, or an alarm.


Bit 1; UPDATE TIME BUFFERS DISABLE

While this bit is set updates of the timer registers (registers 3 though 8) by the clock are suspended. This is useful when reading the time registers to prevent some digits from changing before the entire set of registers can be read. It is also useful when writing to the time buffers to set the clock.

Bit 2; WRITE TIME BUFFERS TO CLOCK
When this bit is set to 1, the contents of the time buffers (registers 3 through 8) are copied to the clock's internal timekeeping registers. Disable the time buffer update before doing this.


Bit 3; CLOCK STOP
While this bit is set of 1, the timekeeping function of the clock stops and updates to time registers (registers 3 through 8) are suspended.

Bit 4 ; EEPROM PAGE Least Significant Bit, and
Bit 5 EEPROM PAGE Most Significant Bit

Control Register bits 4 and 5 constitute the two upper bits of the EEPROM address via the DS Interface as follows:

Bit 5      Bit 4    Address range of write ($4A) and read ($5A) instruction
0 0 $00..$0F
0 1 $10..$1F
1 0 $20..$2F
1 1 $30..$3F


Bit 6; ALARM ENABLE

While this bit is set to one, the contents of the alarm registers (registers 9 through E) are compared with the clock's internal timekeeping registers each second. When a match occurs, if this bit is set, the alarm will be triggered.


Bit 7; EEPROM INTERPRETER INHIBIT

The EEPROM Interpreter will not start interpreting programs stored in EEPROM if this bit is not set to 1. This bit can be set by grounding the Data Out Pin (pin 1) during chip initialization -thus providing a means of recovery in case a program is written to the EEPROM that interferes with user access via the DS Interface.

Alarm

The alarm will be triggered when the contents of the alarm registers (registers $9 through $E) match the timekeeping registers in the clock (and consequently the time registers, registers 3 through 8), provided that the Alarm Enable bit in the control register (register $F, bit 6 ) is set to 1. If the flag that is EPROM location $00, bit 5 is set to 1, and the EEPROM checksum is valid, the EEPROM Interpreter will begin execution of the program that starts at the address contained in EEPROM location $02. If the flag that is EEPROM location 0, bit 5 is not set, or the EEPROM checksum is not valid, then when the alarm is triggered, it will make the Data Output Pin (pin 1, open drain) low.

Note: in order for the chip to work, after programming, you must:
1. Select the Low Frequency Crystal oscillator 67 ms + 32k clock, and
2. Disable Reset to free up pin 1 as open drain output.

 


NEXT PART (click) EEPROM/INTERPRETER

 

Return to (click) CLOCK/CALENDAR/ALARM/EEPROM INTERPRETER OVERVIEW


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