/*
Copyright 2007 Richard Cappels
www.projects.cappels.org

Complied with 	avr-gcc (GCC) 3.4.6
The compiler can be downloaded from http://sourceforge.net/

This assumesan ATTINY2313/AT90S2313 an R/2R DAC (or other DAC) connected to PORTB, and a 4 MHz clock.

The frequency measured at the output of the DAC is 1.00045 kHz.
The power supply voltage on the breadboard is 5.00 V.
The maximum output voltage was measured at 4.96 V.
The minimum output voltage was measured at 0 V.
The spurious components are -30 with repsect to the 1 kHz signal.
Light low pass filtering, by placing a 10 resistor and .015 uf capacitor on the R-2R DAC output resulted in
reducing the 1 kHz signal by 3 db and makes the spurious components 50 db below the 1 kHz signal



2313sine080212A Imported from 8515 version.


*/

#include <avr/interrupt.h>
#include <stdlib.h>	
#include <avr/sleep.h>

	char sinetable [32];
	int  i ;	
	void ioinit (void)								// Initialize  I/O.
	
	/*
	I/O Pin assignments for AT90S8515:
	Port A is the R/2R DAC
	PORT B is Test output
	PORT C is unused
	PORT D is unused
	*/
{		
												//Initialize output ports
	
	PORTB = 0b11111111;
	PORTD = 0b11111111;
	DDRB  = 0b11111111;
	DDRD  = 0b00000000;
}




void timer0_setup (void)									
{
	TCCR0 = 0b00000001;  
	TCNT0 = 175;   
	TIMSK = 0b00000010;
}


 


ISR (SIG_OVERFLOW0)							// Counter0 Interrupt Service
{
PORTB = (sinetable[i++]);
	TCNT0 = 175;	
	if (i==32)		
	{
		i=0;
	}							
}




void arraysettup (void)

{										
	sinetable[0]=127;					// Put 32 step 8 bit sine table into array.
	sinetable[1]=152;	
	sinetable[2]=176;	
	sinetable[3]=198;
	sinetable[4]=217;
	sinetable[5]=233;
	sinetable[6]=245;
	sinetable[7]=252;
	sinetable[8]=254;
	sinetable[9]=252;
	sinetable[10]=245;
	sinetable[11]=233;
	sinetable[12]=217;
	sinetable[13]=198;
	sinetable[14]=176;
	sinetable[15]=152;
	sinetable[16]=128;
	sinetable[17]=103;
	sinetable[18]=79;
	sinetable[19]=57;
	sinetable[20]=38;
	sinetable[21]=22;
	sinetable[22]=10;
	sinetable[23]=3;
	sinetable[24]=0;
	sinetable[25]=3;
	sinetable[26]=10;
	sinetable[27]=22;
	sinetable[28]=38;
	sinetable[29]=57;
	sinetable[30]=79;
	sinetable[31]=103;	
}





int	main (void)		
{
	ioinit();
	arraysettup();
	timer0_setup();
	i = 0;
	sei();
	while (1)
	{	
		set_sleep_mode(SLEEP_MODE_IDLE);
	}	
    return (0);
}